Introduction to Noise-Resilient Computing

Introduction to Noise-Resilient Computing
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152
By:"Svetlana N. Yanushkevich","Seiya Kasai","Golam Tangim","A.H. Tran"
"Technology & Engineering"
Published on 2013-01-01 by Morgan & Claypool Publishers

In this book, multi-feedback Programmable \u003cb\u003eLogic\u003c/b\u003e Arrays (PLAs) and cyclic binary \u003cbr\u003e\ndecision diagrams (BDDs) are adopted for the ... This book is based on selected \u003cbr\u003e\nlectures, adopted for graduate courses in \u003cb\u003eelectrical\u003c/b\u003e and computer \u003cb\u003eengineering\u003c/b\u003e \u003cbr\u003e\nprograms at ... fundamentals oflogic \u003cb\u003edesign\u003c/b\u003e, based on the textbooks that include \u003cbr\u003e\n\u003cb\u003econtemporary\u003c/b\u003e data structures such as binary decision diagram (in particular, [153\u003cbr\u003e\n]).

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Noise abatement is the key problem of small-scaled circuit design. New computational paradigms are needed -- as these circuits shrink, they become very vulnerable to noise and soft errors. In this lecture, we present a probabilistic computation framework for improving the resiliency of logic gates and circuits under random conditions induced by voltage or current fluctuation. Among many probabilistic techniques for modeling such devices, only a few models satisfy the requirements of efficient hardware implementation -- specifically, Boltzman machines and Markov Random Field (MRF) models. These models have similar built-in noise-immunity characteristics based on feedback mechanisms. In probabilistic models, the values 0 and 1 of logic functions are replaced by degrees of beliefs that these values occur. An appropriate metric for degree of belief is probability. We discuss various approaches for noise-resilient logic gate design, and propose a novel design taxonomy based on implementation of the MRF model by a new type of binary decision diagram (BDD), called a cyclic BDD. In this approach, logic gates and circuits are designed using 2-to-1 bi-directional switches. Such circuits are often modeled using Shannon expansions with the corresponding graph-based implementation, BDDs. Simulation experiments are reported to show the noise immunity of the proposed structures. Audiences who may benefit from this lecture include graduate students taking classes on advanced computing device design, and academic and industrial researchers. Table of Contents: Introduction to probabilistic computation models / Nanoscale circuits and fluctuation problems / Estimators and Metrics / MRF Models of Logic Gates / Neuromorphic models / Noise-tolerance via error correcting / Conclusion and future work

This Book was ranked 29 by Google Books for keyword Contemporary Logic Design on electrical engineering.

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